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2001 Microchip Technology Inc.
Advance Information
DS39541A-page 309
PIC18C601/801
Clock Arbitration ...................................................... 171
Clock Arbitration Timing (Master Transmit) ............. 171
General Call Address Support ................................. 162
Master Mode 7-bit Reception Timing ....................... 169
Master Mode Operation ........................................... 164
Master Mode START Condition ............................... 165
Master Mode Transmission ..................................... 167
Master Mode Transmit Sequence ........................... 164
Multi-Master Mode ................................................... 172
Repeated START Condition Timing ........................ 166
STOP Condition Receive or Transmit Timing .......... 170
STOP Condition Timing ........................................... 170
Waveforms for 7-bit Reception ................................ 161
Waveforms for 7-bit Transmission ........................... 161
ICEPIC In-Circuit Emulator .............................................. 260
INCF ................................................................................ 236
INCFSZ ............................................................................ 237
In-Circuit Serial Programming (ICSP) .............................. 207
Indirect Addressing ............................................................ 60
FSR Register ............................................................. 59
INFSNZ ............................................................................ 237
Initialization Conditions for All Registers ............................ 34
Instruction Cycle ................................................................ 46
Instruction Flow/Pipelining ................................................. 47
Instruction Format ............................................................ 217
Instruction Set .................................................................. 215
ADDLW .................................................................... 221
ADDWF ................................................................... 221
ADDWFC ................................................................. 222
ANDLW .................................................................... 222
ANDWF ................................................................... 223
BC ............................................................................ 223
BCF ......................................................................... 224
BN ............................................................................ 224
BNC ......................................................................... 225
BNN ......................................................................... 225
BNOV ...................................................................... 226
BNZ ......................................................................... 226
BOV ......................................................................... 229
BRA ......................................................................... 227
BSF .......................................................................... 227
BTFSC ..................................................................... 228
BTFSS ..................................................................... 228
BTG ......................................................................... 229
BZ ............................................................................ 230
CALL ........................................................................ 230
CLRF ....................................................................... 231
CLRWDT ................................................................. 231
COMF ...................................................................... 232
CPFSEQ .................................................................. 232
CPFSGT .................................................................. 233
CPFSLT ................................................................... 233
DAW ........................................................................ 234
DCFSNZ .................................................................. 235
DECF ....................................................................... 234
DECFSZ .................................................................. 235
GOTO ...................................................................... 236
INCF ........................................................................ 236
INCFSZ .................................................................... 237
INFSNZ .................................................................... 237
IORLW ..................................................................... 238
IORWF ..................................................................... 238
LFSR ....................................................................... 239
MOVF ...................................................................... 239
MOVFF .................................................................... 240
MOVLB .................................................................... 240
MOVLW ................................................................... 241
MOVWF .................................................................. 241
MULLW ................................................................... 242
MULWF ................................................................... 242
NEGF ...................................................................... 243
NOP ........................................................................ 243
POP ......................................................................... 244
PUSH ...................................................................... 244
RCALL ..................................................................... 245
RESET .................................................................... 245
RETFIE ................................................................... 246
RETLW .................................................................... 246
RETURN ................................................................. 247
RLCF ....................................................................... 247
RLNCF .................................................................... 248
RRCF ...................................................................... 248
RRNCF .................................................................... 249
SETF ....................................................................... 249
SLEEP ..................................................................... 250
SUBFWB .........................................................250
, 251
SUBLW ................................................................... 251
SUBWF ................................................................... 252
SUBWFB ................................................................. 253
SWAPF ................................................................... 254
TBLRD .................................................................... 255
TBLWT .................................................................... 256
TSTFSZ ................................................................... 257
XORLW ................................................................... 257
XORWF ................................................................... 258
Instruction Set, Summary ................................................ 218
INT Interrupt (RB0/INT). See Interrupt Sources
INTCON Register
RBIF Bit ................................................................... 105
Inter-Integrated Circuit. See I2C
Interrupt Control Registers ................................................ 91
INTCON Register ...................................................... 91
INTCON2 Register .................................................... 92
INTCON3 Register .................................................... 93
IPR Registers ............................................................ 99
PIE Registers ............................................................ 97
PIR Registers ............................................................ 95
RCON Register ......................................................... 94
Interrupt Sources .......................................................89
, 207
A/D Conversion Complete ....................................... 197
Capture Complete (CCP) ........................................ 143
Compare Complete (CCP) ...................................... 144
Interrupt-on-Change (RB7:RB4) ............................. 105
RB0/INT Pin, External ............................................. 101
SSP Receive/Transmit Complete ............................ 149
TMR0 Overflow ....................................................... 129
TMR1 Overflow ...............................................130
, 133
TMR2 to PR2 Match ................................................ 136
TMR2 to PR2 Match (PWM) ...........................135
, 146
TMR3 Overflow ...............................................137
, 139
USART Receive/Transmit Complete ....................... 177
Interrupts, Enable Bits
CCP1 Enable (CCP1IE Bit) ..................................... 143
Interrupts, Flag Bits
A/D Converter Flag (ADIF Bit) ................................. 195
CCP1 Flag (CCP1IF Bit) ........................ 142
, 143, 144
Interrupt-on-Change (RB7:RB4) Flag
(RBIF Bit) ................................................ 105
IORLW ............................................................................. 238
IORWF ............................................................................ 238
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